This invention relates to a non-volatile semiconductor memory device which is electrically erasable and programmable and in particular to a non-volatile semiconductor memory device permitting an erasing operation having excellent controllability and reliability.
Heretofore, as non-volatile semiconductor memory devices, stored content of which can be rewritten, EPROM and E.sup.2 PROM are widely used. The EPROM and the E.sup.2 PROM have been characterized as having a high integration capacity and low cost accompanied thereby and by a high function (easiness of use) to rewrite electrically the stored content bit by bit (i.e. in the state where it is mounted in an apparatus) respectively. Demand for the non-volatile semiconductor memory device provided with both of these characteristics is great. A flash type E.sup.2 PROM is positioned as a device satisfying this requirement except that the electric rewriting function associated therewith is restricted to chip-erase (or block-erase) concerning erasing and a number of memory elements having new structures for realizing it are proposed and put to practical use.
An FAST (Floating Gate Asymmetric Source/Drain Tunnel Oxide) type device, furthermore, which is also known, is disclosed in JP-A-62-276878, for example. This memory element consists of a single field effect transistor with a floating gate and a control gate just as an FAMOS type memory element of EPROM and it is excellent in facilitating high density integration. Programming is effected by hot electron injection just as for the FAMOS type. On the other hand, electric chip-erase is effected by using the tunnel effect of electrons just as for the prior art E.sup.2 PROM. Concretely speaking, electrons stored in the floating gate electrode are emitted by the tunnel effect to the source region by applying a positive high voltage to the source region in the state where the control gate electrode and the semiconductor substrate are grounded. An electric field higher than 10 MV/cm applied to the gate oxide film between the floating gate electrode and the source region causes the tunnel effect.
The FAST type is characterized in that the region where electrons tunnel can be restricted to an extremely small area because the thickness of the gate oxide film under the floating gate electrode is reduced (to form a tunnel oxide layer) over the whole surface and the portion of the floating gate electrode superposed on the source region is formed by lateral diffusion of the same region in a self-aligned manner. As a result, even if the portion, where the floating gate electrode and the control gate electrode are superposed on each other, is formed consciously so as not to be great, it is possible to apply the voltage applied from a power supply to the tunnel oxide film with a high efficiency. That is, electric erase can be realized with a low power supply voltage without impairing the smallness of a cell.
Further, in an FAST type memory element, since the programming is effected on the drain side and the erase is effected on the source side, the junction profile of each of them is optimized separately. The drain region has an abrupt profile which causes an intensified electric field at the drain edge for raising the programming efficiency, while the source region has a graded profile which relaxes a maximum electric field at the source edge, to which a high voltage can be applied for the erasing operation. Such a structure is called an asymmetric source and drain structure.
On the other hand, IEEE J. of Solid-State Circuits, Vol. SC-17 (1982) pp 828-832 and IEEE J. of Solid-State Circuits, Vol. SC-17 (1982), pp 833-840 describe a method for applying the voltage when the rewriting operation is effected in an FLOTOX type memory element of E.sup.2 PROM. The peak value of the electric field applied to the thin tunnel oxide film is reduced not by applying instantaneously a predetermined driving voltage but by making the rise of the voltage slow, when the programming and erasing operation is effected. As a result, the stress in the oxide layer at rewriting is suppressed and improvement in the reliability is realized.
In the FAST type memory element, which is one of the prior art techniques described above, one important consideration involves how to suppress parasitic hole injection which takes place at the erasing operation.
In the FAST type memory element, parasitic leak current flows from the source to the semiconductor substrate at the erasing operation. This is due to the fact that among electrons and holes produced by a band-to-band tunneling at the surface of the source region overlapping the floating gate electrode, the holes flow out therefrom to the semiconductor substrate, because the gate oxide layer underneath the floating gate electrode is made uniformly thin, and it is an essential phenomenon. A part of above-mentioned holes flowing out are accelerated by a high electric field between the source and the semiconductor substrate to become hot holes, which are injected into the gate oxide layer. This is the hole injection mentioned beforehand. The injected holes cancel negative charge in the floating gate electrode and at the same time a part thereof is captured in the gate oxide layer to change the tunnel electric field for the electrons. As a result the erasing characteristics are modulated variously, depending on the degree of the injection and the capture of holes described above, which makes it impossible to control precisely the threshold voltages of all the memory cells at chip-erase. Further, since the holes in the gate oxide layer stated above are accumulated by repetition of the programming and erasing operation, their influences are strengthened with an increasing number of rewrite operations, which will be a factor to restrict the available number of rewrites.
On the contrary, in the FLOTOX type memory element of E.sup.2 PROM, since the tunnel region where the gate oxide layer is locally thinned is located within the surface portion of the high impurity concentration region, the generation of electron-hole pairs due to band-to-band tunneling is almost completely suppressed and therefore the above concern does not exist.